JEDEC has released a new Revision C for JEP 143, “Solid-State Reliability Assessment and Qualification Methodologies,” and it’s available now from Document Center Inc. This standard applies to all integrated circuits and their associated packages. It summarizes the suite of reliability documents and publications available for reliability qualification, reliability stress testing, and reliability modeling.
The purpose of JEP 143C is to provide an overview of some of the most commonly used systems and test methods historically performed by manufacturers to assess and qualify the reliability of solid-state products.
This 37-page document is also intended to provide an educational background and overview of some of the technical and economic factors associated with assessing and qualifying microcircuit reliability.
JEP 143C is a revision of JEP143B.01 (June 2008). Changes from Revision B.01 to the new Revision C are described briefly in Annex B, the Informative Change List. They include modifications to the Introduction, Clauses 2, 5, 6.1, 8.1, 8.3 and 9, and the addition of a number of referenced documents.
All current and many obsolete JEDEC standards are available from Document Center Inc. at our website, www.document-center.com. You may also want to contact us by phone (650-591-7600), fax (650-591-7617) or email (info@document-center.com). Our staff is available to assist you with your standards requirements and questions.